The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 2004
Filed:
Jan. 28, 2002
Applicant:
Inventor:
Toshiyuki Tohda, Higashiosaka, JP;
Assignee:
Sharp Kabushiki Kaisha, Osaka, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/7108 ; H01L 2/976 ; H01L 2/994 ; H01L 3/1119 ; H01L 2/900 ;
U.S. Cl.
CPC ...
H01L 2/7108 ; H01L 2/976 ; H01L 2/994 ; H01L 3/1119 ; H01L 2/900 ;
Abstract
An object of the present invention is to suppress a layer-peeling phenomenon in a semiconductor device comprising at least a ferroelectric layer and an upper electrode formed thereon while maintaining the electrical properties of the ferroelectric layer. The semiconductor device of the present invention is characterized in that an upper electrode and a ferroelectric layer have a convex region. By this constitution, a layer peeling can be suppressed. In the present invention, one convex region is formed on one layer, but a plurality of convex regions may be formed on one layer. Alternatively, a concave region may be formed in place of the convex region.