The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 2004

Filed:

Nov. 26, 2002
Applicant:
Inventor:

Marc Piazza, Pontcharra, FR;

Assignee:

STMicroelectronics S.A., Montrouge, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1336 ; H01L 2/18242 ; H01L 2/120 ; H01L 2/976 ; H01L 2/974 ;
U.S. Cl.
CPC ...
H01L 2/1336 ; H01L 2/18242 ; H01L 2/120 ; H01L 2/976 ; H01L 2/974 ;
Abstract

A method for manufacturing DRAM cells in a semiconductor wafer including MOS control transistors and capacitors, the source/drain regions and the gates of the control transistors being covered with a protection layer and with an insulating layer, in which the capacitors are formed at the level of openings formed in the insulating layer which extend to the protection layer covering the gates, and in which first capacitor electrodes are connected to source/drain regions of the control transistors by conductive vias crossing the insulating layer and the protection layer.


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