The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 28, 2004
Filed:
Nov. 12, 2002
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A wide band, wide operating range, general purpose digital phase locked loop (PLL) runs in the digital domain except for the associated Time Digitizer (T2D) and Digitally-Controlled-Oscillator (DCO). By calibrating the T2D and DCO on the fly, a constant PLL loop BW is achieved by using the calibrated Phase Frequency Detection (PFD) and DCO information to normalize the control loop correction regardless of the input clock frequency, power supply voltage, processing and temperature variations. PLL loop BW is completely decoupled from the operating conditions and semiconductor device variation. This means that the PLL loop BW can be chosen very aggressively to reject the noise, thus achieving a low jitter, high performance PLL. Furthermore, since this PLL can reliably operate over a wide operating range, it is a one-design-fits-all general purpose PLL.