The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2004

Filed:

Mar. 03, 2003
Applicant:
Inventors:

Daryl Roberts, Chandler, AZ (US);

Fredrick Zlotnick, Scottsdale, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 ;
U.S. Cl.
CPC ...
H03L 5/00 ;
Abstract

A buffer circuit ( ) receives a selection signal (S ), which selects either a first or second threshold voltage for receiving an input signal (S ) at a logic gate ( ). A switch ( ) and a level-shifter ( ) are used in combination to set a voltage at a node ( ). The first input signal is coupled to the switch. The logic gate is coupled to the node, and the voltage level at the node sets the threshold voltage of the logic gate of the buffer circuit.


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