The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 28, 2004
Filed:
Sep. 25, 2002
Applicant:
Inventors:
Assignee:
Kabushiki Kaisha Toshiba, Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/100 ;
U.S. Cl.
CPC ...
H01L 2/100 ;
Abstract
A semiconductor device-manufacturing method includes a laminated wafer formation step and a dicing step. In the laminated wafer formation step, a metal plate is first laid on one side of a wafer with a solder material interposed, and then the metal plate and the wafer are subjected to decompression pressing to form a one-piece structure. As a result, a laminated wafer is obtained. In the dicing step, the laminated wafer is diced into laminated chips.