Prevention of power state change in response to chassis intrusion when computer system is not in powered up power state

Abstract

A gating circuit for a computer system to prevent a power management signal provided by a computer card slot connector or a system board mounted device to change the power state of the computer system from a lower power state to a higher power state when the chassis of the computer system is open. The computer system includes a chassis intrusion detection switch to provide an indication of whether the chassis is open. In one example, the computer card connector is a card slot connector that conforms to the PCI or AGP computer bus standards, and the power management signal is a PME# signal. The gating circuit also prevents a wake on LAN (WOL) signal received via a jumper from a WOL circuit from changing the power state of the computer system from a lower power state to a higher power state. When the gating circuit receives an indication that the computer system is in a powered up power state, the gating circuit provides a gated power signal to change the power state of the computer system in response to receiving a PME# or WOL signal regardless of whether the chassis is open or closed. The computer system implements a power management strategy such as the Advanced Configuration and Power Interface power strategy. The gating circuit prevents a PME# signal or WOL signal from placing a computer circuit in a higher power state from a non powered up power state during the installation of a computer card in the computer system.