The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2004
Filed:
Dec. 31, 2002
Applicant:
Inventor:
Kouichi Noro, Kawasaki, JP;
Assignee:
Fujitsu Limited, Kawasaki, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/112 ;
U.S. Cl.
CPC ...
G11C 1/112 ;
Abstract
In a ferroelectric memory, there are provided a plurality of word lines, a plurality of bit lines crossing there-with, a plurality of memory cells having ferroelectric capacitors arranged at the positions of these crossovers and a plurality of correction capacitors connectable with the bit lines. At least some of the plurality of correction capacitors are connected with a bit line so as to be capable of increasing bit line capacitance by a prescribed amount.
Noro, Kouichi. (2004). Ferroelectric memory wherein bit line capacitance can be maximized (U.S. Patent No. 6795331). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6795331
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile