The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2004
Filed:
Oct. 16, 2002
Dong-Hwa Kwak, Kyungki-do, KR;
Byung-Seo Kim, Kyungki-do, KR;
Samsung Electronics Co., Ltd., Suwon, KR;
Abstract
A method of fabricating a semiconductor device having a cell array area and a peripheral circuit area is provided. A mold layer is formed on a substrate in the cell array area and the peripheral circuit area. A plurality of first molding holes are formed in the mold layer in the cell array area. A second molding hole is formed in the mold layer in the peripheral circuit area. A storage node layer is formed on the mold layer, in the first molding holes and in the second molding hole. A plurality of storage nodes are formed in the first molding holes and a first portion of a resistor is formed in the second molding hole by removing a portion of the storage node layer. The first portion of the resistor is formed of the storage node layer.