The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2004

Filed:

Sep. 08, 2000
Applicant:
Inventors:

Roman Antosik, Colts Neck, NJ (US);

Andrew Schnable, Cary, NC (US);

Lewis K. Stroll, Morganville, NJ (US);

Richard L. Ukeiley, Marlboro, NJ (US);

Assignee:

Lucent Technologies Inc., Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J 3/06 ;
U.S. Cl.
CPC ...
H04J 3/06 ;
Abstract

Circuitry for a node of an optical communication network is configured to mux (i.e., combine) one or more incoming customer signals for transmission as a single outgoing optical signal and to demux (i.e., split) an incoming optical signal into one or more outgoing customer signals, where the muxing and demuxing clocks are selected from one or more customer clocks recovered from the one or more customer signals, an input clock recovered from the incoming optical signal, and a local clock generated by a local clock generator. When configured for an add/drop configuration, the circuitry selects (1) the muxing clock from the one or more customer clocks, the input clock, and the local clock and (2) the demuxing clock from the input clock and the local clock. When configured for a drop/continue configuration, the circuitry is configured to select both the muxing and demuxing clocks from either the first input clock or the local clock. The circuitry is configured to perform a hardware-based switch to select the backup clock as the new muxing clock upon detection of a loss-of-clock condition for the previously selected muxing clock. The node automatically coordinates its selection of muxing clocks with the other corresponding node in order to avoid loop-timing problems.


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