The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 14, 2004
Filed:
Jun. 30, 2003
Marcus Kastner, Taipei, TW;
Thomas Mikolajick, Dresden, DE;
Infineon Technologies AG, Munich, DE;
Abstract
A method for producing an integrated semiconductor memory configuration includes forming two capacitor modules for each selection transistor from the front and rear side of the substrate wafer respectively. Thus, a higher packing density of memory cells is engendered by the utilization of the rear side of the wafer. A twofold memory read signal can be used for the same cell surface area. Conditions in addition to “0” or “1” can also be saved for each selection transistor in a ferroelectric memory configuration, if the two capacitor modules have a different structure in terms of layer thickness, surface area, or material.