The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2004

Filed:

May. 28, 2003
Applicant:
Inventor:

Nayon Tomsio, Austin, TX (US);

Assignee:

Sun Microsystems, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 ;
U.S. Cl.
CPC ...
H03L 5/00 ;
Abstract

A stable and accurate level shifter for converting voltage levels of signals in CMOS devices. In one embodiment of the invention, the level shifter comprises two legs having transistors operably connected in a source-follower configuration. The biasing of the level shifter is provided by a multistage biasing circuit that comprises a plurality of N-MOS devices. The biasing source can be operated with a single stage or can be configured to combine multiple stages to increase the current (voltage) provided by the biasing circuit. The level shifter of the present invention consumes less power and requires less area on an integrated circuit than prior art level shifters. In addition, the level shifter is insensitive to negative bias temperature instability (NBTI) effects, thereby allowing the level shifter to be highly reliable throughout the life of the part with minimal degradation in the performance and accuracy of the level shifter through time.


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