Methods of fabricating single electron transistors in which the thickness of an insulating layer defines spacing between electrodes

Abstract

Single-electron transistors include first and second electrodes and an insulating layer between them on a substrate. The insulating layer has a thickness that defines a spacing between the first and second electrodes. At least one nanoparticle is provided on the insulating layer. Accordingly, a desired spacing between the first and second electrodes may be obtained without the need for high resolution photolithography. An electrically-gated single-electron transistor may be formed, wherein a gate electrode is provided on the at least nanoparticle opposite the insulating layer end. Alternatively, a chemically-gated single-electron transistor may be formed by providing an analyte-specific binding agent on a surface of the at least one nanoparticle. Arrays of single-electron transistors also may be formed on the substrate. The single-electron transistors may be fabricated by forming a post electrode on a substrate, conformally forming an insulating layer on at least a portion of the post electrode and conformally forming a second electrode on at least a portion of the insulating layer opposite the post electrode. At least one nanoparticle is placed on the insulating layer, between the post electrode and the second electrode.