The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2004

Filed:

Sep. 05, 2002
Applicant:
Inventor:

Makoto Watanabe, Saitama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 1/00 ;
U.S. Cl.
CPC ...
H03L 1/00 ;
Abstract

A pseudo-cubic function generator circuit comprises a CMOS inverter which is applied with a detected voltage of a sensor and supplied with a power supply voltage, and a voltage divider circuit for dividing the power supply voltage, wherein an output terminal of the CMOS inverter is connected to a voltage division point of the voltage divider circuit to generate an output voltage from the voltage division point. The pseudo-cubic function generator circuit can directly generate a large voltage change in a simple circuit configuration with a reduced noise component, and facilitates a setting of each parameter for specifying a cubic function curve. The parameter is set, for example, by scaling substantial gate areas of a P-MOS FET and an N-MOS FET which constitutes the CMOS inverter.


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