The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2004

Filed:

Jun. 18, 2003
Applicant:
Inventor:

David W. Smith, Cedar Park, TX (US);

Assignee:

Advanced Micro Devices, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/037 ;
U.S. Cl.
CPC ...
H03K 3/037 ;
Abstract

Method and apparatus are provided for trapping metastability events to provide a metastable-free output signal. At least three successive values of an input signal are latched successively over a predetermined period which is less than half of a fundamental period of the input signal to provide at least three corresponding latched values. First and second intermediate signals are activated when outputs of all of the at least three corresponding latched values are in respective first and second logic states. An output signal is placed in a first predetermined logic state in response to the second intermediate signal and is changed from the first predetermined logic state to a second predetermined logic state in response to the first intermediate signal.


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