The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2004
Filed:
Dec. 04, 2002
Shigemitsu Tahara, Chitose, JP;
Daisuke Katagiri, Chitose, JP;
Takeshi Shimanuki, Yonezawa, JP;
Masashi Oshiba, Tachikawa, JP;
Other;
Abstract
The present invention realizes higher-speed external output operation synchronized with a clock signal from the viewpoint of prevention of output operation delay due to a level shift circuit and maintenance of a high breakdown voltage of an output buffer. A semiconductor integrated circuit includes a first circuit and a second circuit having a breakdown voltage higher than a breakdown voltage of the first circuit, and operation voltages of the first and second circuits can be made equal to each other or different from each other. The second circuit has a plurality of level shift circuits capable of shifting the level of an output of the first circuit in accordance with an operation voltage of the second circuit, a plurality of external output buffers receiving outputs of the level shift circuits, bypasses for bypassing an input of a predetermined level shift circuit to an input of a predetermined external output buffer, and a selecting circuit for selecting connection of either the predetermined level shift circuit or a bypass to an input of the predetermined external output buffer. In a use form in which the first and second circuits operate with a low voltage, the bypass is selected. In high-voltage operation and burn-in, the level shift circuits are selected.