The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2004
Filed:
Jul. 10, 2003
Byung Soo Park, Ichon-Shi, KR;
Hynix Semiconductor Inc., Kyungki-do, KR;
Abstract
A method of forming a select line in a NAND type flash memory device is disclosed. In the select line having a stack structure of the floating gate, the dielectric film and the control gate, the control gate is patterned so that a first projection is formed at the edge of the control gate, and the floating gate is formed by means of the self-aligned etch process. At this time, the floating gate is patterned so that a second projection the one end of which overlaps the first projection is formed at the edge of the floating gate. Next, the first and second projections are electrically connected using the contact plugs and the metal line, whereby a voltage is simultaneously applied to the control gate of a low resistance and the floating gate of a high resistance. Therefore, the present invention can minimize generation of voltage drop to improve electrical characteristics, and obviate a process of removing the dielectric film for electrically connecting the floating gate and the control gate to simplify the process steps.