Contour mitigation using parallel blue noise dithering system

Abstract

A method and system for displaying fractional bit data in order to increase the bit depth of a PWM display without requiring the use of an excessive number of bit planes. One embodiment of the present invention combines the outputs of two random number generators ( ) with the outputs of a row counter ( ) and column counter ( ) to yield row and column indexes into two 32×32 cell blue noise masks. The row and column indexes select a blue noise mask threshold for a given pixel. The threshold from the first blue noise mask ( ) is applied to a comparator ( ) where it is compared to the fractional bit portion of the pixel data. A first blue noise bit, BN( ), is generated based on this comparison. Typically, BN( ) is a “1” when the fractional portion of the pixel data exceeds the threshold value from the mask. The same threshold data is also processed by inverter ( ) to produce the threshold that would be shored in an inverted form of Mask A. Inverter ( ) prevents the circuitry from having to store four separate blue noise masks. The output of the inverter ( ) is also compared to the fractional pixel data to produce a second blue noise bit, BN( ). In the same manner, the second blue noise mask ( ) is used to generate two additional blue noise bits. The four blue noise bits are then used alternately in the quad-frame display of FIG. with the integer portion of the pixel data.