The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2004

Filed:

Feb. 14, 2003
Applicant:
Inventors:

David B. Harnishfeger, Chandler, AZ (US);

Daniel E. Brueske, Fort Lauderdale, FL (US);

Frederick L. Martin, Plantation, FL (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/085 ; H03L 7/089 ; H03L 7/099 ; H03L 7/10 ; H03L 7/16 ;
U.S. Cl.
CPC ...
H03L 7/085 ; H03L 7/089 ; H03L 7/099 ; H03L 7/10 ; H03L 7/16 ;
Abstract

A system for coarsely tuning at least one voltage controlled oscillator (VCO) ( ) in a phase locked loop (PLL) synthesizer ( ) that includes a phase-frequency detector (PFD) for determining a phase difference between a VCO frequency and a reference frequency and providing an error signal if the VCO frequency and reference frequency are at least 2&pgr; radians out of phase. A monitor ( ) is then used for tracking the number of error signals produced by the PFD. The free running frequency of the VCO may be coarsely tuned in the event the monitor circuit reaches some predetermined level. The invention offers great advantage in enabling a PLL to be coarsely tuned to enable the PLL's VCO to remain with an operational range despite operational factors that effect circuit operation.


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