The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2004

Filed:

Feb. 24, 2003
Applicant:
Inventors:

Mehmet Aslan, Milpitas, CA (US);

Qing Feng Ren, San Jose, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/90175 ; H03K 1/9094 ; H03K 5/153 ; H03K 5/22 ;
U.S. Cl.
CPC ...
H03K 1/90175 ; H03K 1/9094 ; H03K 5/153 ; H03K 5/22 ;
Abstract

The present invention is directed to a buffer having dual thresholds. The buffer has an input terminal and an output terminal and comprises a current source, first through fourth transistors, a current mirror, and an output driver. The buffer uses an “analog” topology to achieve accurate buffering when the thresholds of applied signals are not centered about the mid-supply range. The buffer is useful (among other circuits) in analog and mixed circuit integrated circuits that have relatively high voltage supply levels and signals having logic thresholds that are not centered about the mid-supply level. The buffer uses feedback from the output to achieve hysteresis.


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