The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2004

Filed:

Dec. 29, 2003
Applicant:
Inventors:

Ramon S. Co, Trabuco Canyon, CA (US);

Tat Leung Lai, Torrance, CA (US);

Assignee:

Kingston Technology Co., Fountain Valley, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/102 ;
U.S. Cl.
CPC ...
G01R 3/102 ;
Abstract

A production test machine pre-screens panels of memory modules for shorts and leakage and other D.C. parameters. Memory modules are constructed as part of a panel of 6 or so modules formed on the same substrate. The modules are connected together by links of the substrate. The D.C. tests are performed on memory modules before separation from the panel (de-panelization), while the modules are still connected together by the panel links. Using parallel testing, a whole panel of modules can be D.C. tested at the same time. Failing modules can then be marked or noted, and the good modules separated from the panel links and sent to a more expensive A.C. tester for functional testing. The spacing or pitch of test heads on the D.C. tester can be adjusted for different sizes of panels.


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