The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2004

Filed:

Oct. 18, 2002
Applicant:
Inventors:

Robert Ballenger, San Jose, CA (US);

Kan Chiu Seto, Saratoga, CA (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 5/00 ; G05F 1/40 ;
U.S. Cl.
CPC ...
G05F 5/00 ; G05F 1/40 ;
Abstract

An apparatus and method for significantly reducing the initial set-point error and voltage margining accuracy of a DC/DC converter. The initial set-point error is reduced by utilizing the remote sense lines of a DC/DC converter to sense the voltage from the DC/DC converter that is actually applied to the load. A power supply controller having inputs coupled to the remote sense lines compares the sensed voltage to a precision voltage reference and provides an output voltage to the TRIM input of the DC/DC converter. The apparatus and method may be implemented in a voltage supply margining test set-up to test the functionality of an electronic device while the DC/DC converter supplies a voltage to the device that is at either the upper or lower margin of an acceptable supply voltage range of the device.


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