The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 10, 2004
Filed:
Sep. 24, 2002
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
A semiconductor integrated circuit device includes an external connection pad, an electrostatic discharge protection circuit, an output circuit, an output pre-buffer circuit, an output-signal-fixing circuit and an internal circuit. The output-signal-fixing circuit includes a first capacitor and a second capacitor and fixes an output signal from a second pre-buffer circuit at an “L” level (low voltage) even when an output from the internal circuit is in a floating state. During an ESD test, since an output signal from the second pre-buffer circuit is fixed at an “L” level (low voltage) by the output-signal-fixing circuit, the NMIS transistor is in an OFF state. In this manner, a surge current is prevented from flowing locally into the NMIS transistor.