The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 03, 2004
Filed:
Feb. 20, 2002
Cornel D. Stanescu, Bucharest, RO;
Adrian M. Tache, Bucharest, RO;
Horia Profeta, Bucharest, RO;
Radu H. Iacob, Santa Clara, CA (US);
Adam P. Cosmin, Milpitas, CA (US);
Catalyst Semiconductor, Inc., Sunnyvale, CA (US);
Abstract
A digital potentiometer, configurable and programmable using nonvolatile memory is disclosed. A unity-gain configured, rail-to-rail operational amplifier, used as voltage follower of buffer, can be inserted, by programming, between an internal wiper terminal and an output terminal of the digital potentiometer. This way, in certain applications, it is possible to take advantage of the low output resistance given by an analog buffer. The operational amplifier can be shutdown and bypassed by a switching device to provide a circuit behavior similar to a digital potentiometer without an output buffer. Using a dual-writing circuitry, first the complemented data, then the data itself, are written in the nonvolatile memory, improving the reliability. A Gray-code counter having a single bit changed at one time and no decode glitch is present. A make-before-break circuitry gives a short overlap conduction time for any adjacent pair of switches; one being turned-off while the other is turned-on. The resistor array is of high resistivity poly-type, with increased width and number of contacts, providing additional protection in short-circuited operation when the buffer is removed. The switches connected close to resistor array terminals are designed using ESD-proof rules.