The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 03, 2004

Filed:

Dec. 15, 2001
Applicant:
Inventors:

Roberto Coccioli, Simi Valley, CA (US);

Mohamed A. Megahed, San Diego, CA (US);

Trang N. Trinh, Cypress, CA (US);

Larry D. Vittorini, Irvine, CA (US);

John S. Walley, Ladera Ranch, CA (US);

Assignee:

Skyworks Solutions, Inc., Irvine, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/3552 ; H01L 2/348 ; H01L 2/352 ;
U.S. Cl.
CPC ...
H01L 2/3552 ; H01L 2/348 ; H01L 2/352 ;
Abstract

One exemplary embodiment is a structure comprising a laminate substrate having a top surface for receiving a semiconductor die. The exemplary structure further comprises an antenna element situated on a bottom surface of the laminate substrate, where the antenna element is suitable for connection to the semiconductor die. According to this exemplary embodiment, the structure further comprises a laminate substrate reference pad in the laminate substrate, where the laminate substrate reference pad is situated over the antenna element. The exemplary structure further comprises at least one laminate substrate reference via situated at a side of the antenna element. The at least one laminate substrate reference via can be electrically connected to the laminate substrate reference pad. The at least one laminate substrate reference via can be electrically coupled to a printed circuit board reference via in a printed circuit board.


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