The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 27, 2004
Filed:
Jul. 12, 2002
Applicant:
Inventors:
Matthew S. Von Thun, Colorado Springs, CO (US);
Scott C. Savage, Ft. Collins, CO (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/90175 ;
U.S. Cl.
CPC ...
H03K 1/90175 ;
Abstract
An apparatus comprising (i) an input circuit configured to provide a predetermined voltage tolerance in response to a plurality of control signals and (ii) a control circuit configured to generate the plurality of control signals in response to one or more input signals.
Von Thun, Matthew. (2004). Five volt tolerant input scheme using a switched cmos pass gate (U.S. Patent No. 6768339). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6768339
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile