The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2004

Filed:

Feb. 18, 1997
Applicant:
Inventors:

Nawaf K. Bitar, San Jose, CA (US);

Robert M. English, Menlo Park, CA (US);

Rajagopal Ananthanarayanan, Sunnyvale, CA (US);

Assignee:

Silicon Graphics, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/00 ;
U.S. Cl.
CPC ...
G06F 9/00 ;
Abstract

A system and a method of scheduling a plurality of threads from a multi-threaded program. A shared arena is provided in user memory, wherein the shared arena includes a register save area for each of the plurality of threads. A processor, when allocated to the application, executes the application's user-level scheduler and selects a user-level thread from a plurality of available threads, wherein the step of selecting includes the step of reading register context associated with the selected thread from one of the plurality of register save areas. In multikernel systems, kernels having access to an application's register save areas can execute preempted threads from that application with no kernel-to-kernel communication. Likewise, kernels having access to an application's user-level run queues can execute ready-to-run threads from that application with no kernel-to-kernel communication.


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