Semiconductor memory device and electronic instrument

Abstract

A highly integrated semiconductor memory device capable of operating at high speed having a plurality of main word lines which extend along a first direction across memory blocks, and sub word lines disposed in each of the memory blocks and subordinate to each of the main word lines. Sub row decoders are provided corresponding to the memory blocks. Each of the sub row decoders has a plurality of sub word select signal lines extending along a second direction and selects one of the sub word lines. First and second signal supply sections, which supply sub word select signals to the sub word select signal lines disposed in the sub row decoders, are provided on either end in the first direction. A block select signal line extending in the sub row decoder along the second direction is connected with the second signal supply section. The second signal supply section generates the sub word select signal based on the potential of the block select signal line.