The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2004

Filed:

Apr. 21, 2003
Applicant:
Inventors:

Shang-Yuan Chuang, Tucson, AZ (US);

James L. Todsen, Tucson, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 3/00 ;
U.S. Cl.
CPC ...
H03M 3/00 ;
Abstract

An analog-to-digital converter ( ) includes a high order delta sigma modulator followed by a decimation filter. A monitor circuit ( )coupled to the output of the delta sigma modulator operates to reset its integrators if an unstable condition is detected on the output. The monitor circuit produces first and second jamming signals in response to either a detected overvoltage or undervoltage of the delta sigma modulator input. A logic circuit (SW ) includes a data input coupled to the output of the delta sigma modulator and a data output ( ) that jams the input of digital filter ( ) with “1” s or “0” s in response to the first or second jamming signal, respectively, to ensure a correct (+) or (−) full scale decimation filter output.


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