The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2004

Filed:

Dec. 21, 1998
Applicant:
Inventors:

Min Cao, Mountain View, CA (US);

Paul J. Vande Voorde, San Mateo, CA (US);

Wayne M. Greene, Los Gatos, CA (US);

Malahat Tavassoli, Los Altos, CA (US);

Assignee:

Agilent Technologies, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/900 ;
U.S. Cl.
CPC ...
H01L 2/900 ;
Abstract

A semiconductor isolation structure. The semiconductor isolation structure includes a substrate. A first device and a second device are formed within the substrate. An isolation region is formed within the substrate between the first device and the second device. The isolation region includes a deep region which extends into the substrate. The deep region includes a deep region cross-sectional area. A shallow region extends to the surface of the substrate. The shallow region includes a shallow region cross-sectional area. The deep region cross-sectional area is greater than the shallow region cross-sectional area. For an alternate embodiment, the deep region includes an oxide and the shallow region includes a protective wall. The protective wall can be formed from an oxide and a nitride.


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