The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2004

Filed:

Apr. 30, 2002
Applicant:
Inventor:

James Janesick, Huntington Beach, CA (US);

Assignee:

ESS Technology, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 3/14 ;
U.S. Cl.
CPC ...
H04N 3/14 ;
Abstract

An imager includes an array of imager cells coupled to a multi-mode controller. The multi-mode controller includes circuitry that implements several modes of operation, including a high-light mode, a low-light mode, and a Snap mode. The high-light mode provides charge accumulation in a photoreceptor potential well, a readout potential well, and a sense node potential well. The low-light mode provides charge accumulation in the photoreceptor potential well constrained by an integration potential well. The Snap mode of operation simultaneously transfers accumulated charge for a set of the imager cells to their sense nodes. In addition, the multi-mode controller may select one of a plurality of V+ integration voltages for setting up a selected charge capacity in one of the imager cells. Thus, the V+ integration voltage may be increased to provide charge capacity to address increased light levels. The imager thereby provides low noise characteristics and is configurable for a wide range of charge capacity, for a wide range of light levels, as compared to conventional imager cell implementations.


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