The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 2004
Filed:
Jan. 07, 2000
Leonard P. Chen, Santa Barbara, CA (US);
Howard T. Chang, Santa Barbara, CA (US);
Eileen M. Herrin, Goleta, CA (US);
Mary J. Hewitt, Santa Barbara, CA (US);
John L. Vampola, Santa Barbara, CA (US);
Raytheon Company, Waltham, MA (US);
Abstract
A time delay integration circuit in which a number of unit cell inputs ( ) along with their respective switches ( ) are input to a bi-directional BBD circuit ( ). The BBD circuit performs an SCA TDI with reduced ROIC circuitry and compatibility with standard LSI processing. The bi-directional BBD circuit has numerous pairs of MOSFETs ( ) connected in series and numerous storage capacitors ( ) having one of their terminals respectively connected between each of the MOSFET pairs and the other of their terminals alternately connected to clock phases Ø and Ø . The gates of the MOSFETs in each pair are separated from the clock phases Ø and Ø and function respectively as screen gate and transfer clock for one direction of charge flow, and as transfer clock and screen gate for the other direction of charge flow. Transfer direction is changed by switching which MOSFET in a pair becomes clocked as a transfer gate and which becomes a screen gate.