The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 2004
Filed:
Feb. 22, 2002
Reno L. Sanchez, Albuquerque, NM (US);
Douglas E. Thorpe, Albuquerque, NM (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
Probe points can be inserted ( ) into an FPGA-based embedded processor SoC ( ) while specifying hardware and software cores with a design automation tool. This tool then aids the user (via high level GUI) in imbedding logic analysis functions in the SoC and connecting selected monitor signals to the logic analyzer. The design automation tool provides the necessary support files for the logic analysis software suite for naming and formatting of monitor signals on the waveform display. Trigger and trace information can be captured for the probe points and waveforms representing the captured information can be displayed ( ) for analysis. An integrated logic analyzer core can be downloaded ( ) into the FPGA-based embedded processor SoC to facilitate insertion of the probe points and capture of information. A software application can receive the captured information and translate it into a format suitable for display.