The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 2004
Filed:
Aug. 02, 2002
Toshio Arakawa, Kawasaki, JP;
Daisuke Miura, Kawasaki, JP;
Masayuki Okamoto, Kawasaki, JP;
Mitsuaki Nagasaka, Kawasaki, JP;
Hiroyuki Honda, Kawasaki, JP;
Shuji Yoshida, Kawasaki, JP;
Kenji Kobayashi, Nagoya, JP;
Kenji Yoshida, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
Disclosed is a method for automatic wiring design between block circuits of an integrated circuit, which performs an automatic connection between an inter-block wire disposed between a first circuit block and a second circuit block, and terminals formed along sides of the first and second blocks, the sides facing each other. The method comprises the steps of (S ) sorting the terminals according to the width thereof; and (S S ) selecting a terminal from the terminals in descending order of the width, and connecting between the selected terminal and an inter-block wire belonging to a same net as the terminal. In another embodiment, the method comprises the steps of (a) sorting the terminals, connected to a power supply wire, according to the value of electric current passing through the terminals; and (b) selecting a terminal from the terminals in descending order of the value of electric current and connecting between the selected terminal and an inter-block wire belonging to a same net as the selected terminal.