The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6757880 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 29, 2004

Filed:

Sep. 24, 2001
Applicant:
Inventor:

Makoto Kakegawa, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

By comprising a logical circuit storage unit for storing a logical circuit, a transmission line circuit generation unit for generating a transmission line circuit based on the logical circuit stored in the logical circuit storage unit, a transmission line circuit storage unit for storing the transmission line circuit generated by the transmission line circuit generation unit, a transmission line circuit editing unit for editing the transmission line circuit stored in the transmission line storage unit and a logical circuit modification unit for modifying the generated logical circuit based on the transmission line circuit edited by the transmission line circuit editing unit, work that has been manually done can be automated. Therefore, labor can be reduced and data reliability can be improved.


Find Patent Forward Citations

Kakegawa, Makoto. (2004). Logical circuit designing device, logical circuit designing method, storage medium and program (U.S. Patent No. 6757880). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6757880

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