The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 2004
Filed:
Apr. 09, 2001
Leland Freddie Rusk, Austin, TX (US);
Jeffrey Brinkley, Georgetown, TX (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
An integrated apparatus and method for testing a very large scale integration (VLSI) device is implemented. An interface between automatic test equipment (ATE) and a device under test (DUT) includes a switch and associated control logic that mediates data transfer between high speed buses coupled to the DUT. Additionally, traffic may be switched to a port connected to a bus coupled to the ATE. This bus need not operate at the full speed of the I/O buses of the DUT. The switch also couples to a static random access memory (SRAM) data cache array which may be used for delayed echo of data between ports. Additionally a logic analyzer in the interface may be used in conjunction with the switch and cache to selectively capture data transferred between the DUT and ATE. The configuration of the switch is programmable depending on the testing performed on the DUT.