The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6757214 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 29, 2004

Filed:

May. 22, 2003
Applicant:
Inventors:

Kazuaki Kawaguchi, Kawasaki, JP;

Shigeo Ohshima, Yokohama, JP;

Nobuo Watanabe, Yokohama, JP;

Yoshinori Ogawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

A synchronous type semiconductor device which inputs/outputs data with respect to a host includes a memory circuit, command decoder and CAS latency setting circuit. The command decoder decodes a command control signal input from the host in synchronism with a clock input from the host and outputs the decoded command to the memory circuit. The command includes a read command and mode register set command. The CAS latency setting circuit sets CAS latency in a read cycle based on a predetermined command output from the command decoder and a function control signal input from the host. The predetermined command is a command other than the mode register set command.


Find Patent Forward Citations

Kawaguchi, Kazuaki. (2004). Synchronous type semiconductor memory device (U.S. Patent No. 6757214). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6757214

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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