The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2004

Filed:

Nov. 01, 2002
Applicant:
Inventor:

Naoki Nagashima, Tokyo, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ;
U.S. Cl.
CPC ...
H01L 2/14763 ;
Abstract

A process for fabricating a semiconductor device, which reduces the number of steps required for forming a via hole and a wiring trench in the insulating film comprised of a low dielectric-constant insulating material, resulting in a lower cost for fabrication and a shorter turn around time, is provided. A photosensitive silazane film is exposed and developed to form a hard mask on an interlayer dielectric. The hard mask defines a wiring pattern for a wiring layer and a position of a via hole. Then, a resist film is formed on the interlayer dielectric to form a resist mask having a via hole pattern, and part of a via hole is formed using the resist mask. The interlayer dielectric is subjected to anisotropic etching using the hard mask to form a wiring trench and to allow the via hole to reach the wiring layer, and the wiring layer is exposed.


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