The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 22, 2004
Filed:
Apr. 02, 2002
Peter F. Chu, Poway, CA (US);
Northrop Grumman Corporation, Los Angeles, CA (US);
Abstract
A cascadable divide-by-two binary counter circuit ( ) that has particular application for use as a synchronous divider circuit ( ) in a phase lock loop ( ). The counter circuit ( ) employs a D flip-flop ( ) that receives a D input and provides a Q output. A first AND gate ( ) is responsive to a P input and a Q input, where the Q input is the output from a preceding counter circuit and the P input is the state of all of the preceding counter circuits. The output of the AND gate ( ) is applied to an exclusive-OR gate ( ) along with the Q output of the flip-flop ( ). The output of the exclusive-OR gate ( ) is applied to one input of a second AND gate ( ). The other input of the second AND gate ( ) is a reset signal and the output of the second AND gate ( ) is the D input of the flip-flop ( ). A decoder ( ) is programmed to provide the reset signal when the desired count is reached.