The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2004

Filed:

Dec. 22, 2000
Applicant:
Inventors:

James T. Theodoras, II, Plano, TX (US);

Matthew L. Heston, Plano, TX (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/12 ; G06F 1/04 ; H04L 7/00 ; H03L 7/00 ;
U.S. Cl.
CPC ...
G06F 1/12 ; G06F 1/04 ; H04L 7/00 ; H03L 7/00 ;
Abstract

A method and apparatus for synchronizing clocks is provided that is flexible and compensates for process, voltage, and temperature (PVT) variations and other timing differences between two devices. The present invention includes producing an up-converted clock from a system clock, the up-converted clock having a frequency that is a multiple of the frequency of the system clock, producing an aligned clock from a data-aligned clock from a first device and a counter clock from a second device, producing a de-jittered clock, selecting a first reference clock to send to the first device from the up-converted clock, the aligned clock and the de-jittered clock, and selecting a second reference clock to send to the second device from the up-converted clock, the aligned clock and the de-jittered clock.


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