The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2004

Filed:

Jan. 07, 2003
Applicant:
Inventors:

Roberto Bez, Milan, IT;

Emilio Camerlenghi, Bergamo, IT;

Stefano Ratti, San Donato Milanese, IT;

Assignee:

StMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/9788 ;
U.S. Cl.
CPC ...
H01L 2/9788 ;
Abstract

A process for fabricating non-volatile memory cells on a semiconductor substrate includes forming a stack structure comprised of a first polysilicon layer isolated from the substrate by an oxide layer. The first polysilicon layer, oxide layer, and semiconductor substrate are cascade etched to define a first portion of a floating gate region of the cell and at least one trench bordering an active area of the memory cell. The at least one trench is filled with an isolation layer. The process further includes depositing a second polysilicon layer onto the whole exposed surface of the semiconductor, and etching the second polysilicon layer to expose the floating gate region formed in the first polysilicon layer, thereby forming extensions adjacent the above portion of the first polysilicon layer.


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