The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2004

Filed:

Mar. 20, 2002
Applicant:
Inventors:

Kazuo Teshirogi, Kawasaki, JP;

Yuzo Shimobeppu, Kawasaki, JP;

Kazuhiro Yoshimoto, Kawasaki, JP;

Mitsuhisa Watanabe, Kawasaki, JP;

Yoshiaki Shinjo, Kawasaki, JP;

Eiji Yoshida, Kawasaki, JP;

Noboru Hayasaka, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/100 ;
U.S. Cl.
CPC ...
H01L 2/100 ;
Abstract

The present invention relates to a method of manufacturing a semiconductor substrate including the back grind step, the dicing step, the pick up step, and the die bonding step of the wafer; and to a semiconductor substrate jig used in such method. The object of the present invention is to mitigate the effect and to prevent damage caused by the lack of strength in thinned semiconductor substrates. A jig with an outer frame , and a rubber film arranged within the outer frame and having increasing and decreasing body size while deforming its shape by supplying air therein are provided. As the volume of the rubber film increases, the wafer-fixing jig deforms the rubber film and allows the tapes and arranged between the wafer and the rubber film A to be pushed toward the wafer gradually from the center outward. The attachment step, the back grind step, the tape reapplication step, the pick up step and the die bonding step are conducted using such wafer-fixing jig.


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