The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 2004
Filed:
Mar. 15, 2002
Stephen Matthew Barnes, Albuquerque, NM (US);
Samuel Lee Miller, Albuquerque, NM (US);
Murray Steven Rodgers, Albuquerque, NM (US);
MEMX, Inc., Albuquerque, NM (US);
Abstract
A multi-level shielded multi-conductor interconnect bus for use in interconnecting MEM devices with control signal sources and a method of fabricating a multi-level shielded multi-conductor interconnect bus are disclosed. In one embodiment, a multi-level shielded interconnect bus ( A) formed on a substrate ( ) includes first and second level electrically conductive lines ( ) arranged in sets of one, two or more conductive lines between first and second level electrically conductive shield walls ( ). The first and second level electrically conductive lines ( ) are surrounded by various layers of dielectric material ( ). A first level electrically conductive shield ( ) overlies the first level electrically conductive lines ( ) and shield walls ( ). A second level electrically conductive shield ( ) overlies the second level electrically conductive lines ( ) and shield walls ( ).