The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2004
Filed:
Feb. 01, 2002
Applicant:
Inventor:
David C. Wyland, Morgan Hill, CA (US);
Assignee:
Cradle Technologies, Inc., Mountain View, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/328 ;
U.S. Cl.
CPC ...
G06F 1/328 ;
Abstract
A digital system having a split transaction memory access. The digital system can access data from a system memory through a read buffer (FIFO) located between the processor of the digital system and the system bus. The read buffer is implemented with two FIFOs, a first incoming data FIFO for reading data, and a second outgoing address FIFO for transmitting read requests. The processor of the digital system can access the data FIFO and read data while the data transfer is still in progress. This decreases the processing latency, which allows the processor to be free to perform additional tasks.