The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6737344 B1

PDF
Full Text
Expired
Date of Patent:
May. 18, 2004

Filed:

Nov. 27, 2001
Applicant:
Inventors:

Satoru Yamagata, Fukuyama, JP;

Masanori Yoshimi, Fukuyama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/13205 ;
U.S. Cl.
CPC ...
H01L 2/13205 ;
Abstract

In a method for manufacturing a memory cell of a nonvolatile semiconductor memory, a floating gate, first insulating film and control gate are successively stacked on a tunnel oxide film formed on a substrate of the nonvolatile semiconductor memory. The control gate, the first insulating film and the floating gate are patterned in stripes. Subsequently, a damaged portion of the tunnel oxide film immediately below a sidewall of the floating gate is removed by isotropic etching. A second insulating film is deposited to cover the control gate, sidewalls of the first insulating film, the floating gate and the tunnel oxide film. Thereby, a variation in threshold voltages between memory cells is suppressed.


Find Patent Forward Citations

Yamagata, Satoru. (2004). Method for manufacturing nonvolatile semiconductor memory with narrow variation in threshold voltages of memory cells (U.S. Patent No. 6737344). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6737344

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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