The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2004

Filed:

May. 24, 2001
Applicant:
Inventors:

Joel Hatsch, München, DE;

Winfried Kamp, München, DE;

Ronald Künemund, Dietramszell, DE;

Eva Lackerschmid, München, DE;

Heinz Söldner, Bruckmühl-Heufeldmühle, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ; G06F 9/455 ;
U.S. Cl.
CPC ...
G06F 1/750 ; G06F 9/455 ;
Abstract

A method for optimizing the layout of cells of an integrated circuit includes providing a cell-based network list with references to cell definitions with parameterizable dimensions, calculating a layout of an integrated circuit using the cell-based network list, extracting a primary network list from the layout, optimizing the component dimensions of at least some of the components of the integrated circuit using at least one predetermined optimization parameter and a simulation using the primary network list, creating an optimized secondary network list using the results of the component optimization, and automatically modifying the layout with respect to cell dimensions using a secondary network list.


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