The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2004

Filed:

Mar. 25, 2002
Applicant:
Inventor:

Kouzou Ichimaru, Higashikunisaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 ;
U.S. Cl.
CPC ...
H03L 7/00 ;
Abstract

A timer circuit having an oscillator circuit that has low power consumption and a stable frequency of the output signal. Timer circuit has highly stable oscillator counter and frequency dividing value controller Highly stable oscillator generates a standard signal at a prescribed frequency. Counter determines the frequency ratio of the frequency of the internal signal to the frequency of the standard signal, and, corresponding to the frequency ratio, frequency dividing value controller changes the frequency dividing value of frequency divider Because the difference between the frequency of the internal signal and the frequency of the standard signal can be known from the frequency ratio, it is possible to perform control such that the frequency of the output signal is kept stable at a prescribed frequency. In this case, as a constitution wherein the highly stable oscillator operates intermittently, even when highly stable oscillator with high power consumption is used, it is still possible to lower the power consumption of the highly stable oscillator and to decrease the overall power consumed by the entire timer circuit.


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