The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2004

Filed:

Jan. 29, 2002
Applicant:
Inventors:

Takuo Sugano, Setagaya-ku, Tokyo-to, JP;

Toru Toyabe, Fujimi-shi, Saitama-ken, JP;

Tatsuro Hanajiri, Setagaya-ku, Tokyo-to, JP;

Akira Saito, Yamatokooriyama, JP;

Yoshiro Akagi, Osaka, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 3/10392 ;
U.S. Cl.
CPC ...
H01L 3/10392 ;
Abstract

A fully inverted type SOI-MOSFET has a channel region constructed of a portion that belongs to a top silicon layer and is located just under a gate electrode and a source region and a drain region , which belong to the top silicon layer and are located adjacent to this channel region . The channel region is inverted throughout the entire thickness during operation. The source region has a source resistance R , which satisfies a relation that (1/g )>R with respect to the mutual conductance g of the channel region itself. According to this fully inverted type SOI-MOSFET, the effective mutual conductance (G ) can be increased.


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