The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 04, 2004
Filed:
Apr. 21, 2003
Applicant:
Inventors:
Tohru Miwa, Tokyo, JP;
Hideo Toyoshima, Tokyo, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/122 ;
U.S. Cl.
CPC ...
G11C 1/122 ;
Abstract
In a shadow RAM using a ferroelectric capacitor, a memory cell constituted by connecting a ferroelectric capacitor directly to each of storage nodes of an unloaded four-transistor SRAM cell formed of four transistors. Thus, the number of transistors per one memory cell can be reduced by two transistors, so that a storage capacity can be increased further.
Miwa, Tohru. (2004). Shadow ram cell using a ferroelectric capacitor (U.S. Patent No. 6731530). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6731530
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile