The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2004

Filed:

Dec. 03, 2002
Applicant:
Inventors:

J. Mikko Hakkarainen, Palm Beach Gardens, FL (US);

Kantilal Bacrania, Palm Bay, FL (US);

Eric C. Sung, Palm Bay, FL (US);

Hsin-Shu Chen, Melbourne, FL (US);

Bang-Sup Song, La Jolla, CA (US);

Mario Sanchez, Palm Bay, FL (US);

Assignee:

Intersil Americas Inc, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/716 ;
U.S. Cl.
CPC ...
H03K 1/716 ;
Abstract

A dual pump circuit including a transmission gate and a dual charge pump. The transmission gate includes a p-channel transistor and an n-channel transistor, each having a control terminal and a pair of current terminals coupled between a dual pump input and a dual pump output. The dual charge pump includes first and second pump circuits, where each pump circuit is coupled to the dual pump input and to a control terminal of a corresponding one of the transmission gate transistors. Each pump circuit is operative to linearize operation of its corresponding transmission gate transistor by maintaining VGS—VT constant. The dual pump circuit is used in a track and hold circuit including at least one dual pump sampling circuit, at least one sampling capacitor, and a control circuit for controlling input signal sampling timing. Each dual pump sampling circuit includes the transmission gate and a dual charge pump.


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