The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 2004
Filed:
Feb. 09, 2001
Applicant:
Inventor:
Frank Worrell, San Jose, CA (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/300 ; G06F 1/5177 ;
U.S. Cl.
CPC ...
G06F 1/300 ; G06F 1/5177 ;
Abstract
A circuit that may be used with a split transaction bus. The circuit generally comprises a register logic and a compare logic. The register logic may be configured to (i) present a first identification signal associated with a first slave device to perform a first transaction and (ii) store a second identification signal associated with a second slave device in place of the first identification signal responsive to a ready signal presented by the second slave device. The compare logic may be configured to (i) compare the second identification signal with the first identification signal and (ii) present a back off signal responsive to the compare.